******************************************************************************** * * * PASS 960126-0721 START * * SA : 22 SOLAR-A * * TIME : 96/01/26 10:13:57 * * * ******************************************************************************** -NO--ID--IC-CMD----ITEM-----SCHEDULE--TRANSMIT---VERIFY--E-C-S--S/S TX COUNT- //////////////////// XMIT START TIME : 10:14:38 //////////////////// 001. C. ******************* 10:20:39 * * * C. PASS START 10:20:39 * * * C. ******************* 10:20:39 * * * 002. DC 08-AD SXT CHK DIS 10:21:54 10:21:54 1 A002. DC 08-AD SXT CHK DIS 10:21:57 1 1 003. DC 08-25 TMX-H-REP 10:22:06 10:22:06 1 A003. DC 08-25 TMX-H-REP 10:22:09 1 1 //////////////////// XMIT END TIME : 10:22:39 //////////////////// //////////////////// XMIT START TIME : 10:22:46 //////////////////// 001. C. ******************* 10:22:48 * * * C. * B C S RECOVERY * 10:22:48 * * * C. ******************* 10:22:48 * * * C. 10:22:48 * * * 002. DC 07-1C BCS CPU DIS 10:22:51 10:22:51 1 A002. DC 07-1C BCS CPU DIS 10:22:52 1 1 003. DC 07-19 BCS ADRS-SET 10:22:57 10:22:57 1 A003. DC 07-19 BCS ADRS-SET 10:22:58 1 1 BC 07-00 10:22:58 10:22:58 1 A BC 07-00 10:22:59 1 * BC 07-00 10:22:59 10:22:59 1 A BC 07-00 10:23:00 1 * . DC 07-11 BCS BC EXEC 10:23:02 10:23:02 1 A . DC 07-11 BCS BC EXEC 10:23:04 1 1 007. DC 08-7A BCS MEM H 10:23:08 10:23:08 1 A007. DC 08-7A BCS MEM H 10:23:12 1 1 BCS CHECK ERROR= 1 010. C. IF ERROR.EQ.0 10:23:23 * * * 011. C. GOTO SUMRST 10:23:25 * * * 012. C. MEMLD 10:23:26 * * * 013. DC 07-18 ENA DRCT DEC 10:23:28 10:23:28 1 A013. DC 07-18 ENA DRCT DEC 10:23:29 1 1 014. DC 07-1D BCS CPU ENA 10:23:33 10:23:33 1 A014. DC 07-1D BCS CPU ENA 10:23:34 1 1 015. DC 07-81 KECOPY 10:23:36 10:23:36 1 A015. DC 07-81 KECOPY 10:23:38 1 1 017. DC 07-1C BCS CPU DIS 10:23:41 10:23:41 1 A017. DC 07-1C BCS CPU DIS 10:23:43 1 1 018. DC 01-1B ROG-SET 10:23:45 10:23:45 1 A018. DC 01-1B ROG-SET 10:23:48 1 1 BC 01-69 10:23:48 10:23:48 1 A BC 01-69 10:23:49 1 * . DC 01-11 TCU BC EXEC 10:23:52 10:23:52 1 A . DC 01-11 TCU BC EXEC 10:23:53 1 * 020. DC 01-1B ROG-SET 10:24:03 10:24:03 1 A020. DC 01-1B ROG-SET 10:24:04 1 1 BC 01-6A 10:24:04 10:24:04 1 A BC 01-6A 10:24:05 1 * . DC 01-11 TCU BC EXEC 10:24:08 10:24:08 1 A . DC 01-11 TCU BC EXEC 10:24:09 1 * 022. DC 01-1B ROG-SET 10:24:18 10:24:18 1 A022. DC 01-1B ROG-SET 10:24:20 1 1 BC 01-6B 10:24:20 10:24:20 1 A BC 01-6B 10:24:21 1 * . DC 01-11 TCU BC EXEC 10:24:23 10:24:23 1 A . DC 01-11 TCU BC EXEC 10:24:24 1 * 023. C. 10:24:25 * * * 024. DC 01-1B ROG-SET 10:24:30 10:24:30 1 A024. DC 01-1B ROG-SET 10:24:32 1 1 BC 01-6C 10:24:32 10:24:32 1 A BC 01-6C 10:24:33 1 * . DC 01-11 TCU BC EXEC 10:24:37 10:24:37 1 A . DC 01-11 TCU BC EXEC 10:24:38 1 * 026. DC 07-1C BCS CPU DIS 10:24:44 10:24:44 1 A026. DC 07-1C BCS CPU DIS 10:24:45 1 1 027. DC 07-19 BCS ADRS-SET 10:24:48 10:24:48 1 A027. DC 07-19 BCS ADRS-SET 10:24:49 1 1 BC 07-00 10:24:49 10:24:49 1 A BC 07-00 10:24:50 1 * BC 07-00 10:24:50 10:24:50 1 A BC 07-00 10:24:51 1 * . DC 07-11 BCS BC EXEC 10:24:53 10:24:53 1 A . DC 07-11 BCS BC EXEC 10:24:55 1 1 031. DC 08-7A BCS MEM H 10:25:00 10:25:00 1 A031. DC 08-7A BCS MEM H 10:25:04 1 1 BCS CHECK ERROR= 17 026. DC 07-1C BCS CPU DIS 10:25:25 10:25:25 1 A026. DC 07-1C BCS CPU DIS 10:25:26 1 1 027. DC 07-19 BCS ADRS-SET 10:25:27 10:25:27 1 A027. DC 07-19 BCS ADRS-SET 10:25:28 1 1 BC 07-00 10:25:28 10:25:28 1 A BC 07-00 10:25:29 1 * BC 07-00 10:25:29 10:25:29 1 A BC 07-00 10:25:30 1 * . DC 07-11 BCS BC EXEC 10:25:31 10:25:31 1 A . DC 07-11 BCS BC EXEC 10:25:33 1 1 031. DC 08-7A BCS MEM H 10:25:36 10:25:36 1 A031. DC 08-7A BCS MEM H 10:25:40 1 1 BCS CHECK ERROR= 17 012. C. MEMLD 10:25:58 * * * 013. DC 07-18 ENA DRCT DEC 10:25:58 10:25:58 1 A013. DC 07-18 ENA DRCT DEC 10:26:00 1 1 014. DC 07-1D BCS CPU ENA 10:26:01 10:26:01 1 A014. DC 07-1D BCS CPU ENA 10:26:02 1 1 015. DC 07-81 KECOPY 10:26:05 10:26:05 1 A015. DC 07-81 KECOPY 10:26:06 1 1 017. DC 07-1C BCS CPU DIS 10:26:09 10:26:09 1 A017. DC 07-1C BCS CPU DIS 10:26:11 1 1 018. DC 01-1B ROG-SET 10:26:13 10:26:13 1 A018. DC 01-1B ROG-SET 10:26:16 1 1 BC 01-69 10:26:16 10:26:16 1 A BC 01-69 10:26:17 1 * . DC 01-11 TCU BC EXEC 10:26:19 10:26:19 1 A . DC 01-11 TCU BC EXEC 10:26:20 1 * 020. DC 01-1B ROG-SET 10:26:26 10:26:26 1 A020. DC 01-1B ROG-SET 10:26:34 1 0 020. DC 01-1B ROG-SET 10:26:38 10:26:38 1 A020. DC 01-1B ROG-SET 10:26:40 1 1 BC 01-6A 10:26:40 10:26:40 1 A BC 01-6A 10:26:41 1 * . DC 01-11 TCU BC EXEC 10:26:44 10:26:44 1 A . DC 01-11 TCU BC EXEC 10:26:46 1 * * 999. DC 08-7B ACS MOD H 10:26:57 10:26:57 1 *A999. DC 08-7B ACS MOD H 10:27:02 1 1 //////////////////// XMIT END TIME : 10:27:07 //////////////////// //////////////////// XMIT START TIME : 10:27:13 //////////////////// 007. DC 08-22 BDR PAUSE 10:27:18 10:27:18 1 A007. DC 08-22 BDR PAUSE 10:27:20 1 1 008. DC 01-5E SANT-A ON 10:27:21 10:27:21 1 A008. DC 01-5E SANT-A ON 10:27:23 1 1 DC 01-5F XANT-A ON 10:27:23 10:27:23 1 A DC 01-5F XANT-A ON 10:27:25 1 1 DC 01-20 SBR-A-RNG 10:27:25 10:27:25 1 A DC 01-20 SBR-A-RNG 10:27:27 1 1 009. DC 08-25 TMX-H-REP 10:27:29 10:27:29 1 A009. DC 08-25 TMX-H-REP 10:27:31 1 1 //////////////////// XMIT END TIME : 10:27:37 //////////////////// //////////////////// XMIT START TIME : 10:27:46 //////////////////// 022. DC 01-1B ROG-SET 10:27:53 10:27:53 1 A022. DC 01-1B ROG-SET 10:27:54 1 1 BC 01-6B 10:27:54 10:27:54 1 A BC 01-6B 10:27:55 1 * . DC 01-11 TCU BC EXEC 10:27:57 10:27:57 1 A . DC 01-11 TCU BC EXEC 10:27:58 1 * 024. DC 01-1B ROG-SET 10:28:10 10:28:10 1 A024. DC 01-1B ROG-SET 10:28:12 1 1 BC 01-6C 10:28:12 10:28:12 1 A BC 01-6C 10:28:13 1 * . DC 01-11 TCU BC EXEC 10:28:15 10:28:15 1 A . DC 01-11 TCU BC EXEC 10:28:17 1 * 026. DC 07-1C BCS CPU DIS 10:28:40 10:28:40 1 A026. DC 07-1C BCS CPU DIS 10:28:41 1 1 027. DC 07-19 BCS ADRS-SET 10:28:44 10:28:44 1 A027. DC 07-19 BCS ADRS-SET 10:28:45 1 1 BC 07-00 10:28:45 10:28:45 1 A BC 07-00 10:28:46 1 * BC 07-00 10:28:46 10:28:46 1 A BC 07-00 10:28:47 1 * . DC 07-11 BCS BC EXEC 10:28:54 10:28:54 1 A . DC 07-11 BCS BC EXEC 10:28:56 1 1 029. DC 08-70 MANU FLR H 10:28:58 10:28:58 1 A029. DC 08-70 MANU FLR H 10:29:02 1 1 031. DC 08-7A BCS MEM H 10:29:05 10:29:05 1 A031. DC 08-7A BCS MEM H 10:29:10 1 1 BCS CHECK ERROR= 0 033. DC 08-7B ACS MOD H 10:29:19 10:29:19 1 A033. DC 08-7B ACS MOD H 10:29:24 1 1 036. C. SUMRST 10:29:54 * * * 037. DC 01-1B ROG-SET 10:29:55 10:29:55 1 A037. DC 01-1B ROG-SET 10:29:56 1 1 BC 01-68 10:29:56 10:29:56 1 A BC 01-68 10:29:57 1 * . DC 01-11 TCU BC EXEC 10:30:00 10:30:00 1 A . DC 01-11 TCU BC EXEC 10:30:01 1 * * 999. DC 08-21 BDR REC 10:30:24 10:30:24 1 *A999. DC 08-21 BDR REC 10:30:25 1 1 039. DC 01-1B ROG-SET 10:30:29 10:30:29 1 A039. DC 01-1B ROG-SET 10:30:30 1 1 BC 01-60 10:30:30 10:30:30 1 A BC 01-60 10:30:31 1 * . DC 01-11 TCU BC EXEC 10:30:33 10:30:33 1 A . DC 01-11 TCU BC EXEC 10:30:34 1 * 041. DC 07-12 BCS BC ENA 10:30:44 10:30:44 1 A041. DC 07-12 BCS BC ENA 10:30:45 1 1 BC 07-85 10:30:45 10:30:45 1 A BC 07-85 10:30:46 1 * BC 07-0A 10:30:46 10:30:46 1 A BC 07-0A 10:30:47 1 * . DC 07-11 BCS BC EXEC 10:30:50 10:30:50 1 A . DC 07-11 BCS BC EXEC 10:30:52 1 1 043. DC 07-12 BCS BC ENA 10:30:55 10:30:55 1 A043. DC 07-12 BCS BC ENA 10:30:56 1 1 BC 07-85 10:30:56 10:30:56 1 A BC 07-85 10:30:57 1 * BC 07-0A 10:30:57 10:30:57 1 A BC 07-0A 10:30:58 1 * . DC 07-11 BCS BC EXEC 10:31:00 10:31:00 1 A . DC 07-11 BCS BC EXEC 10:31:02 1 1 //////////////////// XMIT END TIME : 10:34:34 //////////////////// ******************************************************************************** * * * PASS 960126-0721 END * * SA : 22 SOLAR-A * * TIME : 96/01/26 10:34:36 * * * ********************************************************************************