******************************************************************************** * * * PASS 960501-0825 START * * SA : 22 SOLAR-A * * TIME : 96/05/01 12:09:43 * * * ******************************************************************************** -NO--ID--IC-CMD----ITEM-----SCHEDULE--TRANSMIT---VERIFY--E-C-S--S/S TX COUNT- //////////////////// XMIT START TIME : 12:11:08 //////////////////// 001. C. ******************* 12:11:10 * * * C. PASS START 12:11:10 * * * C. ******************* 12:11:10 * * * A002. DC 08-AD SXT CHK DIS 12:11:11 * * * 002. DC 08-AD SXT CHK DIS 12:20:02 12:20:02 1 A002. DC 08-AD SXT CHK DIS 12:20:04 1 1 003. DC 08-25 TMX-H-REP 12:20:13 12:20:13 1 A003. DC 08-25 TMX-H-REP 12:20:16 1 1 //////////////////// XMIT END TIME : 12:21:02 //////////////////// //////////////////// XMIT START TIME : 12:21:10 //////////////////// 001. C. ******************* 12:21:10 * * * C. * B C S RECOVERY * 12:21:10 * * * C. ******************* 12:21:10 * * * C. 12:21:10 * * * 002. DC 07-1C BCS CPU DIS 12:21:14 12:21:14 1 A002. DC 07-1C BCS CPU DIS 12:21:14 1 1 003. DC 07-19 BCS ADRS-SET 12:21:21 12:21:21 1 A003. DC 07-19 BCS ADRS-SET 12:21:22 1 1 BC 07-00 12:21:23 12:21:23 1 A BC 07-00 12:21:23 1 * BC 07-00 12:21:24 12:21:24 1 A BC 07-00 12:21:24 1 * . DC 07-11 BCS BC EXEC 12:21:27 12:21:27 1 A . DC 07-11 BCS BC EXEC 12:21:28 1 1 007. DC 08-7A BCS MEM H 12:21:33 12:21:33 1 A007. DC 08-7A BCS MEM H 12:21:37 1 1 BCS CHECK ERROR= 1 013. DC 07-18 ENA DRCT DEC 12:21:54 12:21:54 1 A013. DC 07-18 ENA DRCT DEC 12:21:54 1 1 014. DC 07-1D BCS CPU ENA 12:22:00 12:22:00 1 A014. DC 07-1D BCS CPU ENA 12:22:00 1 1 015. DC 07-81 KECOPY 12:22:04 12:22:04 1 A015. DC 07-81 KECOPY 12:22:04 1 1 016. C. 12:22:06 * * * 017. DC 07-1C BCS CPU DIS 12:22:11 12:22:11 1 A017. DC 07-1C BCS CPU DIS 12:22:11 1 1 * 999. DC 08-7B ACS MOD H 12:22:19 12:22:19 1 *A999. DC 08-7B ACS MOD H 12:22:23 1 1 * 999. DC 08-22 BDR PAUSE 12:22:48 12:22:48 1 *A999. DC 08-22 BDR PAUSE 12:22:49 1 1 * 999. DC 01-5E SANT-A ON 12:22:53 12:22:53 1 *A999. DC 01-5E SANT-A ON 12:22:54 1 1 * 999. DC 01-5F XANT-A ON 12:22:57 12:22:57 1 *A999. DC 01-5F XANT-A ON 12:22:58 1 1 * 999. DC 01-20 SBR-A-RNG 12:23:00 12:23:00 1 *A999. DC 01-20 SBR-A-RNG 12:23:02 1 1 * 999. DC 08-25 TMX-H-REP 12:23:05 12:23:05 1 *A999. DC 08-25 TMX-H-REP 12:23:06 1 1 018. DC 01-1B ROG-SET 12:23:15 12:23:15 1 A018. DC 01-1B ROG-SET 12:23:15 1 1 BC 01-69 12:23:16 12:23:16 1 A BC 01-69 12:23:16 1 * . DC 01-11 TCU BC EXEC 12:23:21 12:23:21 1 A . DC 01-11 TCU BC EXEC 12:23:21 1 * 020. DC 01-1B ROG-SET 12:23:35 12:23:35 1 A020. DC 01-1B ROG-SET 12:23:35 1 1 BC 01-6A 12:23:36 12:23:36 1 A BC 01-6A 12:23:36 1 * . DC 01-11 TCU BC EXEC 12:23:40 12:23:40 1 A . DC 01-11 TCU BC EXEC 12:23:41 1 * 021. C. 12:23:47 * * * 022. DC 01-1B ROG-SET 12:23:54 12:23:54 1 A022. DC 01-1B ROG-SET 12:23:55 1 1 BC 01-6B 12:23:56 12:23:56 1 A BC 01-6B 12:23:56 1 * . DC 01-11 TCU BC EXEC 12:24:00 12:24:00 1 A . DC 01-11 TCU BC EXEC 12:24:01 1 * 023. C. 12:24:02 * * * 024. DC 01-1B ROG-SET 12:24:14 12:24:14 1 A024. DC 01-1B ROG-SET 12:24:15 1 1 BC 01-6C 12:24:16 12:24:16 1 A BC 01-6C 12:24:16 1 * . DC 01-11 TCU BC EXEC 12:24:20 12:24:20 1 A . DC 01-11 TCU BC EXEC 12:24:20 1 * 025. C. 12:24:21 * * * 026. C. TIME OVER >>> STOP 12:24:22 * * * 027. C. 12:24:23 * * * 028. DC 07-1C BCS CPU DIS 12:24:35 12:24:35 1 A028. DC 07-1C BCS CPU DIS 12:24:35 1 1 029. DC 07-19 BCS ADRS-SET 12:24:43 12:24:43 1 A029. DC 07-19 BCS ADRS-SET 12:24:43 1 1 BC 07-00 12:24:44 12:24:44 1 A BC 07-00 12:24:44 1 * BC 07-00 12:24:45 12:24:45 1 A BC 07-00 12:24:45 1 * . DC 07-11 BCS BC EXEC 12:24:49 12:24:49 1 A . DC 07-11 BCS BC EXEC 12:24:50 1 1 030. C. ***(NIGHT ONLY)**** 12:24:52 * * * 031. DC 08-70 MANU FLR H 12:24:55 12:24:55 1 A031. DC 08-70 MANU FLR H 12:24:59 1 1 032. C. 12:25:01 * * * 033. DC 08-7A BCS MEM H 12:25:03 12:25:03 1 A033. DC 08-7A BCS MEM H 12:25:07 1 1 BCS CHECK ERROR= 0 035. DC 08-7B ACS MOD H 12:25:16 12:25:16 1 A035. DC 08-7B ACS MOD H 12:25:21 1 1 039. DC 01-1B ROG-SET 12:25:27 12:25:27 1 A039. DC 01-1B ROG-SET 12:25:27 1 1 BC 01-68 12:25:28 12:25:28 1 A BC 01-68 12:25:28 1 * . DC 01-11 TCU BC EXEC 12:25:33 12:25:33 1 A . DC 01-11 TCU BC EXEC 12:25:33 1 * 040. C. 12:25:45 * * * 041. DC 01-1B ROG-SET 12:25:47 12:25:47 1 A041. DC 01-1B ROG-SET 12:25:49 1 1 BC 01-60 12:25:50 12:25:50 1 A BC 01-60 12:25:50 1 * . DC 01-11 TCU BC EXEC 12:25:54 12:25:54 1 A . DC 01-11 TCU BC EXEC 12:25:54 1 * 042. C. 12:26:07 * * * 043. DC 07-12 BCS BC ENA 12:26:10 12:26:10 1 A043. DC 07-12 BCS BC ENA 12:26:10 1 1 BC 07-85 12:26:11 12:26:11 1 A BC 07-85 12:26:11 1 * BC 07-0A 12:26:12 12:26:12 1 A BC 07-0A 12:26:12 1 * . DC 07-11 BCS BC EXEC 12:26:16 12:26:16 1 A . DC 07-11 BCS BC EXEC 12:26:17 1 1 044. C. 12:26:18 * * * 045. DC 07-12 BCS BC ENA 12:26:22 12:26:22 1 A045. DC 07-12 BCS BC ENA 12:26:23 1 1 BC 07-85 12:26:24 12:26:24 1 A BC 07-85 12:26:24 1 * BC 07-0A 12:26:25 12:26:25 1 A BC 07-0A 12:26:25 1 * . DC 07-11 BCS BC EXEC 12:26:28 12:26:28 1 A . DC 07-11 BCS BC EXEC 12:26:30 1 1 //////////////////// XMIT END TIME : 12:26:42 //////////////////// //////////////////// XMIT START TIME : 12:26:48 //////////////////// 011. DC 08-21 BDR REC 12:29:16 12:29:16 1 A011. DC 08-21 BDR REC 12:29:16 1 1 012. C. ******************* 12:30:24 * * * C. E N D 12:30:24 * * * C. ******************* 12:30:24 * * * //////////////////// XMIT END TIME : 12:32:18 //////////////////// ******************************************************************************** * * * PASS 960501-0825 END * * SA : 22 SOLAR-A * * TIME : 96/05/01 12:32:22 * * * ********************************************************************************