******************************************************************************** * * * PASS 980324-1032 START * * SA : 22 SOLAR-A * * TIME : 98/03/24 15:25:57 * * * ******************************************************************************** -NO--ID--IC-CMD----ITEM-----SCHEDULE--TRANSMIT---VERIFY--E-C-S--S/S TX COUNT- //////////////////// XMIT START TIME : 15:26:07 //////////////////// A002. DC 08-25 TMX-H-REP 15:26:14 * * * 001. C. ******************* 15:26:19 * * * C. * B C S RECOVERY * 15:26:19 * * * C. ******************* 15:26:19 * * * C. 15:26:19 * * * 002. DC 08-25 TMX-H-REP 15:37:18 15:37:18 1 A002. DC 08-25 TMX-H-REP 15:37:21 1 1 004. DC 07-1C BCS CPU DIS 15:37:37 15:37:37 1 A004. DC 07-1C BCS CPU DIS 15:37:38 1 1 005. DC 07-19 BCS ADRS-SET 15:37:43 15:37:43 1 A005. DC 07-19 BCS ADRS-SET 15:37:45 1 1 BC 07-00 15:37:45 15:37:45 1 A BC 07-00 15:37:46 1 * BC 07-00 15:37:46 15:37:46 1 A BC 07-00 15:37:47 1 * . DC 07-11 BCS BC EXEC 15:37:50 15:37:50 1 A . DC 07-11 BCS BC EXEC 15:37:51 1 1 006. C. ***(NIGHT ONLY)**** 15:37:53 * * * 007. DC 08-70 MANU FLR H 15:37:58 15:37:58 1 A007. DC 08-70 MANU FLR H 15:38:03 1 1 008. C. 15:38:04 * * * 009. DC 08-7A BCS MEM H 15:38:06 15:38:06 1 A009. DC 08-7A BCS MEM H 15:38:11 1 1 BCS CHECK ERROR= 1 010. C. ***(NIGHT ONLY)**** 15:38:27 * * * 011. DC 08-7B ACS MOD H 15:38:28 15:38:28 1 A011. DC 08-7B ACS MOD H 15:38:33 1 1 012. C. IF ERROR.EQ.0 15:38:44 * * * 013. C. GOTO SUMRST 15:38:45 * * * 014. C. MEMLD 15:38:45 * * * 015. DC 07-18 ENA DRCT DEC 15:38:48 15:38:48 1 A015. DC 07-18 ENA DRCT DEC 15:38:50 1 1 016. DC 07-1D BCS CPU ENA 15:38:57 15:38:57 1 A016. DC 07-1D BCS CPU ENA 15:38:58 1 1 017. DC 07-81 KECOPY 15:39:01 15:39:01 1 A017. DC 07-81 KECOPY 15:39:03 1 1 018. C. 15:39:09 * * * 019. DC 07-1C BCS CPU DIS 15:39:10 15:39:10 1 A019. DC 07-1C BCS CPU DIS 15:39:12 1 1 020. DC 01-1B ROG-SET 15:39:16 15:39:16 1 A020. DC 01-1B ROG-SET 15:39:18 1 1 BC 01-69 15:39:18 15:39:18 1 A BC 01-69 15:39:19 1 * . DC 01-11 TCU BC EXEC 15:39:22 15:39:22 1 A . DC 01-11 TCU BC EXEC 15:39:23 1 * 021. C. 15:39:35 * * * 022. DC 01-1B ROG-SET 15:39:35 15:39:35 1 A022. DC 01-1B ROG-SET 15:39:38 1 1 BC 01-6A 15:39:38 15:39:38 1 A BC 01-6A 15:39:39 1 * . DC 01-11 TCU BC EXEC 15:39:42 15:39:42 1 A . DC 01-11 TCU BC EXEC 15:39:43 1 * 023. C. 15:39:54 * * * 024. DC 01-1B ROG-SET 15:39:55 15:39:55 1 A024. DC 01-1B ROG-SET 15:39:58 1 1 BC 01-6B 15:39:58 15:39:58 1 A BC 01-6B 15:39:59 1 * . DC 01-11 TCU BC EXEC 15:40:02 15:40:02 1 A . DC 01-11 TCU BC EXEC 15:40:02 1 * 025. C. 15:40:12 * * * 026. DC 01-1B ROG-SET 15:40:13 15:40:13 1 A026. DC 01-1B ROG-SET 15:40:16 1 1 BC 01-6C 15:40:16 15:40:16 1 A BC 01-6C 15:40:17 1 * . DC 01-11 TCU BC EXEC 15:40:20 15:40:20 1 A . DC 01-11 TCU BC EXEC 15:40:21 1 * 027. C. 15:40:33 * * * 028. DC 01-1B ROG-SET 15:40:33 15:40:33 1 A028. DC 01-1B ROG-SET 15:40:36 1 1 BC 01-65 15:40:36 15:40:36 1 A BC 01-65 15:40:37 1 * . DC 01-11 TCU BC EXEC 15:40:40 15:40:40 1 A . DC 01-11 TCU BC EXEC 15:40:41 1 * 031. DC 08-22 BDR PAUSE 15:41:50 15:41:50 1 A031. DC 08-22 BDR PAUSE 15:41:52 1 1 032. C. <20MANT ROT> 15:42:35 * * * 033. DC 08-25 TMX-H-REP 15:43:47 15:43:47 1 A033. DC 08-25 TMX-H-REP 15:43:49 1 1 034. C. 15:43:56 * * * 035. DC 07-1C BCS CPU DIS 15:43:57 15:43:57 1 A035. DC 07-1C BCS CPU DIS 15:43:58 1 1 036. DC 07-19 BCS ADRS-SET 15:44:02 15:44:02 1 A036. DC 07-19 BCS ADRS-SET 15:44:03 1 1 BC 07-00 15:44:03 15:44:03 1 A BC 07-00 15:44:04 1 * BC 07-00 15:44:04 15:44:04 1 A BC 07-00 15:44:05 1 * . DC 07-11 BCS BC EXEC 15:44:07 15:44:07 1 A . DC 07-11 BCS BC EXEC 15:44:08 1 1 037. C. ***(NIGHT ONLY)**** 15:44:11 * * * 038. DC 08-70 MANU FLR H 15:44:12 15:44:12 1 A038. DC 08-70 MANU FLR H 15:44:17 1 1 039. C. 15:44:20 * * * 040. DC 08-7A BCS MEM H 15:44:21 15:44:21 1 A040. DC 08-7A BCS MEM H 15:44:25 1 1 BCS CHECK ERROR= 0 041. C. ***(NIGHT ONLY)**** 15:44:35 * * * 042. DC 08-7B ACS MOD H 15:44:37 15:44:37 1 A042. DC 08-7B ACS MOD H 15:44:41 1 1 043. C. IF ERROR.NE.0. 15:44:43 * * * 044. C. GOTO MEMLD 15:44:44 * * * 045. C. SUMRST 15:44:44 * * * 046. DC 01-1B ROG-SET 15:44:47 15:44:47 1 A046. DC 01-1B ROG-SET 15:44:48 1 1 BC 01-68 15:44:48 15:44:48 1 A BC 01-68 15:44:49 1 * . DC 01-11 TCU BC EXEC 15:44:51 15:44:51 1 A . DC 01-11 TCU BC EXEC 15:44:52 1 * 047. C. 15:45:03 * * * 048. DC 01-1B ROG-SET 15:45:03 15:45:03 1 A048. DC 01-1B ROG-SET 15:45:06 1 1 BC 01-60 15:45:06 15:45:06 1 A BC 01-60 15:45:07 1 * . DC 01-11 TCU BC EXEC 15:45:13 15:45:13 1 A . DC 01-11 TCU BC EXEC 15:45:14 1 * 049. C. 15:45:22 * * * 050. DC 07-12 BCS BC ENA 15:45:23 15:45:23 1 A050. DC 07-12 BCS BC ENA 15:45:24 1 1 BC 07-85 15:45:24 15:45:24 1 A BC 07-85 15:45:25 1 * BC 07-0A 15:45:25 15:45:25 1 A BC 07-0A 15:45:25 1 * . DC 07-11 BCS BC EXEC 15:45:29 15:45:29 1 A . DC 07-11 BCS BC EXEC 15:45:30 1 1 051. C. 15:45:33 * * * 052. DC 07-12 BCS BC ENA 15:45:35 15:45:35 1 A052. DC 07-12 BCS BC ENA 15:45:37 1 1 BC 07-85 15:45:37 15:45:37 1 A BC 07-85 15:45:38 1 * BC 07-0A 15:45:38 15:45:38 1 A BC 07-0A 15:45:39 1 * . DC 07-11 BCS BC EXEC 15:45:42 15:45:42 1 A . DC 07-11 BCS BC EXEC 15:45:43 1 1 057. DC 08-2B RST BAD BANK 15:46:01 15:46:01 1 A057. DC 08-2B RST BAD BANK 15:46:03 1 1 058. DC 08-69 DP DC EXEC 15:46:06 15:46:06 1 A058. DC 08-69 DP DC EXEC 15:46:07 1 * 059. DC 08-21 BDR REC 15:46:14 15:46:14 1 A059. DC 08-21 BDR REC 15:46:17 1 1 //////////////////// XMIT END TIME : 15:48:22 //////////////////// ******************************************************************************** * * * PASS 980324-1032 END * * SA : 22 SOLAR-A * * TIME : 98/03/24 15:48:25 * * * ********************************************************************************